;
;------------------------------------------------------------------------------------
;	 This program is free software; you can redistribute it and/or modify
;    it under the terms of the GNU General Public License as published by
;    the Free Software Foundation; either version 2 of the License, or
;    (at your option) any later version.
;
;    This program is distributed in the hope that it will be useful,
;    but WITHOUT ANY WARRANTY; without even the implied warranty of
;    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;    GNU General Public License for more details.
;
;    You should have received a copy of the GNU General Public License
;    along with this program; if not, write to the Free Software
;    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
;------------------------------------------------------------------------------------
;
;
;Smart A Button Backlight firmware copyright WiimoteMods.com.
;
;Feel free to use it yourself to make your own Smart A Button Backlights or modify the
;code to your liking.  But do not use this code to produce this mod for commercial 
;purposes without prior permission from WiimoteMods.com
;

.include "tn12def.inc"
.def TEMP = R16
.def EEAD = R21				;eeprom read/write address
.def DATA = R17				;saved value in eeprom
.def LEDC = R18				;current pattern
.def HoldCounter = R19
.def HoldMode = R20

.equ LED0 = 0b00000000		;Port B patterns
.equ LED1 = 0b00000100
.equ LED2 = 0b00001100
.equ LED3 = 0b00010000
.equ LED4 = 0b00011000
.equ HOLD = 0x16			;hold button time, HOLD * 213usec = TIME
.equ SAVE = 0x2C			;save timeoout
.equ MODE1 = 0x01
.equ MODE2 = 0x02
.equ USED = 0b01010101	
.equ USEDAD = 0x10
.equ SAVEAD	= 0x16


.org 0x0000
	rjmp Reset
.org INT0addr
	rjmp Interrupt0
.org OVF0addr
	rjmp CounterOverflow

Reset:
	ldi 	TEMP, 0b00011100
	out 	DDRB, TEMP			;set Data Direction Register Bits
	ldi 	TEMP, 0b10000000
	out 	SREG, TEMP			;set Status Register
	ldi 	TEMP, 0b00100010
	out 	MCUCR, TEMP			;set MCU Control Register
	ldi 	TEMP, 0b01000000
	out 	GIMSK, TEMP			;set General Interrupt Mask Register
	ldi 	TEMP, 0b00000010
	out 	TIMSK, TEMP			;set Timer/Counter Interrupt Mask Register
	ldi 	TEMP, 0b00000000	
	out 	TCCR0, TEMP			;set Timer/Counter0 Control Register
	ldi		HoldMode, MODE1
	clr 	HoldCounter	
	clr 	TEMP

	ldi		EEAD, USEDAD
	rcall 	EepromRead
	mov 	TEMP, DATA
	cpi		TEMP, USED
	brne	FirstPower
	ldi 	EEAD, SAVEAD
	rcall   EepromRead
	mov		LEDC, DATA
	rcall 	ShowLED
	rjmp	Loop
	
FirstPower:						;writes a proper value in eeprom if no saved values, or corrupt
	ldi		EEAD, USEDAD
	ldi 	DATA, USED
	rcall 	EepromWrite
	ldi		EEAD, SAVEAD
	ldi		DATA, LED3
	rcall   EepromWrite
	clr 	DATA
	ldi     LEDC, LED1
	mov		LEDC, DATA
	rcall 	ShowLED

Loop:
	sleep
	rjmp 	Loop

ShowLED:
	out 	PORTB, LEDC
	ret

Interrupt0:
	clr		HoldCounter
	cpi		HoldMode, MODE1
	breq 	HoldMode1
	cpi 	HoldMode, MODE2
	breq	HoldMode2

HoldMode1:
    							;Enables the counter with 1/256 scaler, 
	ldi 	TEMP, 0b00000100	;HoldMode0 should wait until HOLD * 213usec = TIME is reached
	out 	TCCR0, TEMP			
	reti

HoldWaiting:
	clr		TEMP				;turns off all LEDs as visual indication
	out		PORTB, TEMP
	inc		HoldMode			;Sets next HoldMode
	clr		HoldCounter			;Clear HoldCounter
	ldi 	TEMP, 0b00000000	;disables Counter
	out 	TCCR0, TEMP	
	reti

HoldMode2:
	ldi 	TEMP, 0b00000100	;HoldMode0 should wait until HOLD * 213usec = TIME is reached
	out 	TCCR0, TEMP			
	cpi		LEDC, LED1			;Compares current output, and changes LED output 
	breq	SetLED2
	cpi		LEDC, LED2
	breq	SetLED3
	cpi 	LEDC, LED3
	breq	SetLED4
	cpi 	LEDC, LED4
	breq	SetLED1
	reti

SetLED1:
	ldi		LEDC, LED1
	rcall 	ShowLED
	reti

SetLED2:
	ldi		LEDC, LED2
	rcall 	ShowLED
	reti

SetLED3:
	ldi		LEDC, LED3
	rcall 	ShowLED
	reti

SetLED4:
	ldi		LEDC, LED4
	rcall 	ShowLED
	reti

SaveSetting:
	ldi 	EEAD, SAVEAD
	mov		DATA, LEDC
	rcall	EepromWrite
	clr		HoldCounter
	ldi		HoldMode, Mode1
	reti

CounterOverflow:
	inc		HoldCounter
	cpi		HoldCounter, HOLD
	sbis	PINB, 1
	breq	HoldWaiting
	cpi		HoldCounter, SAVE
	breq	SaveSetting
	reti
	

EepromWrite:
	sbic 	EECR,EEWE			;if EEWE not clear
	rjmp 	EepromWrite			;wait more

	out		EEAR,EEAD			;output address low byte
		
	out		EEDR,DATA			;output data
	cli							;disable global interrupts	
	sbi 	EECR,EEMWE			;set master write enable, remove if 90S1200 is used	
	sbi		EECR,EEWE			;set EEPROM Write strobe
								;This instruction takes 4 clock cycles since
								;it halts the CPU for two clock cycles
	sei							;enable global interrupts
	ret

EepromRead:
	sbic 	EECR,EEWE			;if EEWE not clear
	rjmp 	EepromRead			;wait more

	out		EEAR,EEAD			;output address low byte

	sbi		EECR,EERE			;set EEPROM Read strobe
								;This instruction takes 4 clock cycles since
								;it halts the CPU for two clock cycles
	in		DATA,EEDR			;get data
	ret